1. Field of the Invention
The present invention generally relates to a semiconductor device and more particularly, to a semiconductor device including an increase voltage generation circuit which generates an increased voltage greater than an externally-supplied power-supply voltage.
2. Description of the Related Art
Recently, in semiconductor devices, to reduce power consumption and to improve device reliability, a power-supply voltage has a tendency to decrease. Therefore, for example, in a semiconductor memory, a voltage difference between voltages for data 1 and 0 also decreases.
Now, for example, in a dynamic random access memory (referred to as DRAM, hereinafter) which is a kind of semiconductor memory, for a transistor for transmitting a memory cell (transmission transistor), an nMOS transistor is commonly used.
In such a DRAM, when logic information "1" is written into the memory cell, to reduce a threshold loss due to the transmission transistor in the memory cell, it is necessary to apply to a gate of the transmission transistor a voltage higher than a power-supply voltage supplied from outside the memory.
Therefore, in the semiconductor device which needs the voltage higher than the externally-supplied power-supply voltage, an increase voltage generation circuit is provided, the circuit generating an increased voltage which is produced by increasing the externally-supplied power-supply voltage.
The increased voltage generation circuit typically produces an increased voltage by performing a pumping operation for a capacitor. In the increased voltage generation circuit, a current-supply ability is relatively low. Therefore, in practical use, an increased voltage stabilizing capacitor having a large capacitance value is provided. In that configuration, electric charge is stored in the increased voltage stabilizing capacitor, a portion of the electric charge is used from the capacitor as necessary, and the capacitor is filled again.
FIG. 1 shows a block diagram of a main part of a prior-art semiconductor device having the increased voltage generation circuit. In a prior-art semiconductor device 1 shown in FIG. 1, high potential VCC of a power-supply voltage is externally applied to an external port 2, and to an external port 3, low potential VSS of the power-supply voltage is externally applied.
A VCC-power-supply line 4 supplies to internal circuits the high potential VCC of the power-supply voltage which is applied through the external port 2. A VSS-power-supply line 5 supplies to the internal circuits the low potential VSS of the power-supply voltage which is applied through the external port 3.
The prior-art semiconductor device shown in FIG. 1 includes an increase voltage generation circuit 6 generating an increased voltage SVCC produced by increasing the high potential VCC of the power-supply voltage, a SVCC-voltage line 7 for supplying to the internal circuits the increased voltage SVCC produced from the increase voltage generation circuit 6, and an increased voltage stabilizing capacitor 8 for stabilizing the increased voltage SVCC.
The prior-art semiconductor device further includes a circuit 9 supplied with the high potential VCC and low potential VSS of the externally-supplied power-supply voltage, and a circuit 10 supplied with the high potential VCC and low potential VSS of the externally-supplied power-supply voltage and the increased voltage SVCC produced from the increase voltage generation circuit 6.
In the prior-art semiconductor device 1 having the increase voltage generation circuit 6, for the stabilization of the increased voltage SVCC, the increased voltage stabilizing capacitor 8 is connected between the SVCC-voltage line 7 and the VSS-power-supply line 5.
The increased voltage stabilizing capacitor 8 is typically formed by using a gate insulating film of a MOS transistor. However, an area of the gate insulating film forming the increased voltage stabilizing capacitor 8 is relatively large. Therefore, a possibility of fault generation in the increased voltage stabilizing capacitor 8 is extremely large.
Although, in the above-mentioned configuration of the prior-art semiconductor device, a high voltage of the increased voltage SVCC is applied to the gate insulating film forming the increased voltage stabilizing capacitor 8. Therefore, there is a problem in that the increased voltage stabilizing capacitor 8 may be easily destroyed.